87Total tutorials
16Chapters
87Tutorials live
16 / 16Active chapters
Judgment-Driven Content
Written by DFT engineers — testability taught as engineering judgment, not tool commands. You learn why scan exists and what makes logic testable, not which flag to type.
Interview-Ready Depth
Topics mirror what DFT and signoff interviews actually test — fault models, controllability/observability, ATPG, coverage loss, MBIST/LBIST, and JTAG.
Working-Example Driven
One progressive project — a flip-flop grown into a scan + compression + ATPG signoff — with RTL, scan structure, test intent, and a debug walkthrough behind every concept.
Design for Testability Complete Curriculum
Your Learning Roadmap
16 chapters · 87 tutorials — from a single testable flip-flop to a scan + compression + ATPG signoff.
87of 87 tutorials live
100% complete
Chapter 0
DFT Foundations
Chapter 1
Manufacturing Test Mindset
Chapter 2
Fault Models
Chapter 3
Scan Architecture
Chapter 4
Scan Insertion
Chapter 5
ATPG
Chapter 6
Test Coverage
Chapter 7
Test Compression
Chapter 8
Memory BIST (MBIST)
Chapter 9
Logic BIST (LBIST)
Chapter 10
Boundary Scan & JTAG
Chapter 11
Test Modes & DFT Signals
Chapter 12
DFT Constraints & Timing
Chapter 13
DFT Debug Methodology
Chapter 14
Industry Case Studies
Chapter 15
Interview & Signoff Review Preparation