AMBA AXI · Module 13
Latency Analysis
Decomposing AXI transaction latency into its contributors — address/arbitration, interconnect decode/routing, conversion, slave access, and response return — plus first-word vs last-word latency and why latency is hidden, not eliminated.
Bandwidth (Chapter 13.1) is the aggregate rate; latency is the per-transaction time — how long from issuing a transaction to getting its result. They're different axes: a path can be high-bandwidth yet high-latency (lots of data, but each transaction takes a while). Latency matters for responsiveness, for real-time deadlines, and — crucially — because it sets the outstanding depth needed to hide it (Little's law, feeding Chapter 13.3). This chapter decomposes a transaction's latency into its contributors (address, decode, conversion, slave access, response return), distinguishes first-word vs last-word latency, and explains why latency is hidden, not eliminated.
1. Latency Is Additive Along the Path
A transaction's latency is the sum of the time at each stage along its path from manager to subordinate and back:
- Address/arbitration — time for the address to be accepted, including any arbitration wait if the subordinate is contended (Chapter 12.4).
- Interconnect decode/routing — the decoder's latency (Chapter 12.3) plus any pipeline registers through the fabric.
- Conversion — cycles added by width converters or clock-domain crossings on the path (Chapter 12.7).
- Slave/memory access — the subordinate's own time to produce the data or accept the write (DRAM row activation, a peripheral's response time) — usually the largest contributor.
- Response/data return — time for the data/response to travel back through the interconnect (decode/CDC/conversion again, in reverse).
These add up: latency = address/arb + decode + conversion + slave access + return. The slave access often dominates (DRAM is tens of cycles), but on a deep interconnect the fabric stages and conversions add meaningfully. Knowing the breakdown tells you where the time goes — and which stage to attack if latency is too high.
2. On the Wire — First-Word Latency
For a read, latency is most visible as the gap between the address being accepted and the first data beat returning:
latency-breakdown — read first-word latency then burst streaming
8 cycles3. Read vs Write, First-Word vs Last-Word
Latency is measured differently per direction and per metric:
- Read latency: from the
ARaddress being accepted to the firstRbeat (first-word latency) — and to the lastRbeat (last-word latency = first-word + (beats−1) × beat-time) for the whole burst. - Write latency: from
AW/Wbeing accepted to theBresponse — the write isn't complete (globally visible) untilBreturns, even ifWwas accepted earlier (the RAW-dependency point, Chapter 9.2).
The first-word vs last-word distinction matters: a CPU waiting on a single critical word cares about first-word latency (get me the word I stalled on — hence WRAP critical-word-first, Chapter 7.4); a bulk transfer cares about last-word (when is it all here). For a burst, first-word latency is the fixed pipeline+access cost; the rest is bandwidth (beats streaming). So latency dominates short transfers (mostly the fixed first-word cost) while bandwidth dominates long ones (mostly streaming).
4. Latency Is Hidden, Not Eliminated
The crucial performance insight: latency cannot be eliminated — only hidden. The slave's access time, the fabric's pipeline depth, the conversion cycles are physical; a single transaction always pays them. What you can do is overlap the latency of many transactions so the aggregate throughput doesn't suffer — that's exactly outstanding transactions (Chapter 8.1) and Little's law: with enough in flight, the data channel stays busy through each transaction's latency, so the latency is hidden behind concurrency even though every individual transaction still takes the full time.
So latency and bandwidth decouple: you hide latency (via outstanding depth) to protect bandwidth, but a single transaction's latency is irreducible. This matters for two cases the hiding doesn't help: a dependency chain (each transaction waits on the previous one's result — can't overlap, so you pay full latency each time, e.g., pointer chasing) and real-time deadlines (a transaction must complete within a bounded time — worst-case tail latency under contention matters, not average). For those, you must actually reduce latency (faster slave, shallower fabric, higher QoS to cut arbitration wait), not just hide it. The outstanding-depth needed to hide latency for throughput is the subject of Chapter 13.3.
5. Common Misconceptions
6. Debugging Insight
7. Verification Insight
8. Interview Questions
9. Summary
Transaction latency is the per-transaction time (distinct from bandwidth's aggregate rate), and it's the sum of contributors along the path: address/arbitration, interconnect decode/routing, conversion (width/CDC), slave access (usually the largest), and response return. For reads, first-word latency (to the first beat) is the fixed pipeline+access cost and last-word latency adds the streaming time of the remaining beats; for writes, latency runs to the B response (a write isn't complete until B). Short transfers are first-word/latency-dominated; long ones bandwidth-dominated.
The defining principle: latency is hidden, not eliminated — the contributors are physical, so a single transaction always pays the full time, but outstanding transactions overlap many latencies to protect aggregate throughput (Little's law, Chapter 13.3). Hiding fails for dependency chains (serial-dependent transactions can't overlap) and real-time deadlines (tail latency), which require actually reducing latency (faster/closer slave, shallower fabric, QoS to cut arbitration wait). Latency bugs are correct-but-slow, so verify by measuring the distribution and tail under worst-case contention — the tail is what real-time deadlines depend on and what average-case testing misses. Next: outstanding depth and buffering — sizing the concurrency that hides this latency.
10. What Comes Next
You've decomposed latency; next, sizing the depth that hides it:
- 13.3 — Outstanding Depth & Buffering (coming next) — relating outstanding depth and buffer sizing to latency hiding (the bandwidth-latency product in practice).
Previous: 13.1 — Bandwidth & Throughput. Related: 8.1 — Why Outstanding Transactions Exist for latency hiding, and 12.4 — Arbiter & Arbitration for the contention that drives tail latency. For the broader protocol catalog, see the AMBA family overview doc.