Burst Address Calculation

Chapters 8.3–8.6 covered each burst type. This chapter gives the general method to compute the address of any beat of any burst — the precise math behind the sequences you've seen. There are two formulas. For an INCR burst, beat n's address is simply the start plus n times the beat size — a linear increment. For a WRAP burst, the address is the aligned base of the block combined with a wrapped offset — the linear address taken modulo the block size, keeping the burst inside one naturally-aligned block. The clearest way to see WRAP is at the bit level: split the address into high and low bits; WRAP wraps only the low (in-block) bits while the high bits (the aligned base) stay fixed. This is a Critical, calculation-heavy chapter — mastering these two formulas lets you derive or verify any burst's addresses.

1. What Is It?

The burst address calculation is the formula for beat n's address. Define: s = beat size in bytes (from HSIZE), L = beat count, B = L × s = block size in bytes, start = the first beat's address.

• INCR (linear): addr[n] = start + n × s
• WRAP (wrap within the aligned block):
  • base = start & ~(B − 1) — the aligned base of the block (low offset bits cleared)
  • offset = (start + n × s) & (B − 1) — the linear address modulo the block size
  • addr[n] = base | offset

The two formulas capture the whole burst-address behavior. INCR just adds the beat size each beat — straightforward linear progression that can cross block boundaries. WRAP computes the same linear address but then takes the offset within the block modulo B (the block size) and combines it with the fixed aligned base — so the address stays within the aligned block of size B, wrapping at the boundary. The key quantities are B = L × s (the block size, which sets the wrap boundary) and the aligned base (the block the burst is confined to). Every burst type's addresses follow from these two formulas with the appropriate L and s.

2. Why Does It Exist?

This calculation exists because both the manager and every observer of the burst must agree on each beat's address — the manager generates it, and the subordinate/memory must predict it (for prefetch and for placing data) — so there must be a precise, shared formula.

The manager generates the addresses (driving HADDR each beat), and the subordinate or memory controller predicts them — to prefetch ahead (chapter 8.1) and to know where each beat's data goes. For these to agree, the address sequence must be fully determined by the burst parameters: the start address, the beat size (HSIZE), the burst type (HBURST), and the beat number. The formulas provide exactly this determinism: given those parameters, anyone can compute beat n's address. So the calculation exists to make the burst's addresses predictable and shared — the manager and the memory derive the same sequence from the same formula. Without a precise formula, the manager and memory could disagree on where a beat goes, corrupting the transfer.

The reason WRAP uses modular arithmetic (rather than a special-case rule) is that wrapping within an aligned block is a modulo operation: the offset within a block of size B is naturally address mod B, and taking it modulo B wraps it at the boundary. So the WRAP formula is just "compute the linear address, then take its in-block offset modulo the block size, and reattach the fixed aligned base." This is clean and general — it works for any B (any burst length and beat size). So the modular formulation exists because wrapping at a power-of-two boundary is exactly a bitwise-AND with (B−1) (modulo, for power-of-two B), which is simple and uniform. The math isn't arbitrary; it's the natural expression of "wrap within an aligned block."

The reason the formulas are parameterized by s and L (rather than hard-coded per type) is that all the burst types share the same underlying math with different parameters: INCR4/8/16 differ only in L; the beat size s comes from HSIZE; WRAP vs INCR differ only in whether the offset wraps. So one pair of formulas (INCR and WRAP), parameterized by s and L, covers all the fixed-length types — and undefined INCR is just the INCR formula with unbounded n. This unification is why the calculation is general: it's two formulas, not eight. Understanding them gives you every burst's addresses. So the parameterized formulas exist to express the whole burst family's address behavior compactly and uniformly.

3. Mental Model

Model the address calculation as an odometer with a section that rolls over: INCR is a normal odometer (digits carry all the way up), while WRAP is an odometer where only the last few digits roll over and the rest are locked.

A normal odometer (INCR) counts up, and when the low digits hit their max, they carry into the higher digits — the number marches straight up without bound (crossing any "boundary"). Now imagine a special odometer (WRAP) where the high digits are locked (fixed at the aligned base) and only the low digits count — when the low digits hit their max, they roll over back to zero instead of carrying up, because there's nowhere to carry (the high digits are locked). So the WRAP odometer cycles within a fixed range (the aligned block): the low digits go up, roll over, and continue, while the high digits never change. The number stays within the block, wrapping at the top. The "locked high digits" are the aligned base; the "rolling low digits" are the in-block offset; the "max before rollover" is the block size B.

This captures the math: normal odometer carrying up = INCR (start + n×s, carries into high bits, crosses boundaries); locked high digits, rolling low digits = WRAP (high bits fixed = aligned base, low bits wrap = offset mod B). The number of "rolling" digits is log2(B) bits. WRAP is a bounded odometer; INCR is an unbounded one.

Watch the formulas produce a WRAP4 sequence:

The model's lesson: WRAP is a bounded odometer — the low bits roll over at the block size while the high bits stay locked. In the waveform, the offset goes 8, 12, then wraps to 0, 4 (mod 16), and the address is the fixed base 0x00 ORed with that offset. The formula reproduces the sequence exactly: locked high bits, rolling low bits.

4. Real Hardware Perspective

In hardware, the address calculation is the manager's address generator: a full-width incrementer for INCR, and a partial-width incrementer (on the low offset bits, with the high bits held) for WRAP — and the subordinate/memory uses the same formula to predict addresses.

The INCR generator is a plain adder: each beat, add s (the beat size) to the current address. Since the carry propagates fully, the address can cross any boundary. So INCR is the simplest hardware — an incrementer. The WRAP generator is the same incrementer but with the high bits forced to the aligned base: it increments the low log2(B) bits (which wrap naturally when they overflow, since the carry-out is discarded) and holds the high bits at the base. So WRAP is a modular incrementer on the low bits — equivalently, increment the full address but then mask: keep the high bits at the base and the low bits modulo B. In hardware this is cheap: a small modular counter on the low bits plus fixed high bits. The block size B (hence which bits are "low") comes from HBURST (the length L) and HSIZE (the size s).

The bit-level view is the hardware reality. The address splits into [high bits | low bits], where the low bits are the log2(B) bits indexing within the block.

For WRAP, the high bits are fixed (the aligned base) and only the low bits increment and wrap; for INCR, the increment carries from the low bits into the high bits (so the address can leave the block). This bit-level picture is exactly the hardware: WRAP holds the high bits and wraps the low bits; INCR lets the carry propagate. So the only hardware difference between INCR and WRAP is whether the carry out of the low offset bits propagates into the high bits (INCR) or is discarded so the low bits wrap (WRAP).

The subordinate/memory uses the same formula to predict addresses for prefetch and data placement. Given HBURST, HSIZE, and the start address, the memory controller computes the same sequence the manager generates — so it knows each beat's address ahead of time. This shared computation is why prefetch works: both sides derive the addresses from the same formula. For WRAP especially, the memory must know to wrap (not just increment) to predict correctly — which it does from HBURST=WRAP and the block size. So the formula is implemented on both sides (generate and predict), and they agree by construction.

A hardware note on the start-address alignment for WRAP: the start address of a WRAP burst should be aligned to the beat size (so each beat is naturally aligned), and the wrap is within the block determined by B. The formula handles any start within the block (for critical-word-first, the start is the critical word's address). The aligned base is computed by clearing the low log2(B) bits of the start. So the hardware derives the base from the start by masking, and wraps within the block from there.

5. System Architecture Perspective

At the system level, the precise address calculation is what makes bursts interoperable and prefetchable — every component (manager, interconnect, memory) computes the same addresses from the shared formula, enabling correct routing, prefetch, and data placement across the whole datapath.

The interoperability depends on the shared formula: a manager from one vendor and a memory controller from another must agree on a WRAP burst's addresses, which they do because both implement the same standardized formula (from the AMBA spec). So the address calculation is a contract that lets independently-designed components handle the same burst correctly. This is why bursts are portable: the address math is standardized, so any compliant manager and memory agree. Without a precise, shared formula, burst interoperability would be impossible — each component might compute addresses differently.

The prefetch and data placement across the datapath rely on every component computing the addresses. The interconnect routes each beat to the right subordinate (it computes the address to decode it); the memory controller prefetches ahead (it computes upcoming addresses); buffers place each beat's data correctly (they compute where it goes). So the entire datapath — manager, interconnect, memory, buffers — uses the address calculation to coordinate. This is the systemic value of the precise formula: it's the shared computation that lets the whole path handle a burst coherently. The address math isn't just the manager's concern; it's computed throughout the datapath.

For WRAP specifically, the system must handle the non-monotonic address sequence (it wraps, so addresses aren't strictly increasing). Components that assume monotonic addresses (some simple prefetchers, some buffer schemes) must account for WRAP's wrap — fetching/placing the wrapped beats correctly. So WRAP imposes a requirement on the datapath: handle the wrap, not just linear increment. A correct system computes the WRAP sequence (via the formula) and handles the wrap throughout. This is a real consideration in interconnect and memory-controller design: support the WRAP address pattern, including the non-monotonic wrap. So the address calculation, especially for WRAP, is a system-wide requirement that the whole datapath must implement consistently. The formula is the shared specification that makes this consistency achievable.

6. Engineering Tradeoffs

The address calculation embodies the deterministic-shared-formula design.

• Formula-based vs ad-hoc addressing. A precise, shared formula makes addresses deterministic and interoperable (manager and memory agree) at the cost of every component implementing the math. Ad-hoc addressing would be simpler per-component but break interoperability. The standardized formula is essential for portable bursts.
• Modular WRAP vs special-case rules. Expressing WRAP as modular arithmetic (offset mod B) is general and uniform (works for any B) and maps to cheap hardware (low-bit wrap). Special-case rules per burst length would be ad-hoc and error-prone. The modular formulation is clean and general.
• Power-of-two block sizes. Burst lengths (4/8/16) and beat sizes (powers of two) make B a power of two, so modulo is a bitwise AND and the wrap is a low-bit truncation — cheap hardware. Non-power-of-two would require real modulo (expensive). The power-of-two constraint keeps the math cheap.
• Shared computation vs single-source. Computing addresses on both the manager (generate) and memory (predict) sides is redundant but enables prefetch and independent design at the cost of duplicated logic. The redundancy is worth it — it's what lets the memory prefetch and components interoperate.

The throughline: the burst address calculation is two parameterized formulas — INCR (start + n×s) and WRAP (aligned base ORed with the linear offset modulo B) — that deterministically give every beat's address. The math is standardized and shared (manager and memory compute the same sequence), modular for WRAP (cheap low-bit wrap on power-of-two blocks), and computed throughout the datapath (for routing, prefetch, placement). This determinism and sharing is what makes bursts interoperable and prefetchable — the formula is the contract the whole datapath honors.

7. Industry Example

Work through the address calculation for several bursts.

A system issues various bursts; here we compute their addresses with the formulas (words, s = 4 bytes).

• INCR4 from 0x1000. addr[n] = 0x1000 + 4n: 0x1000, 0x1004, 0x1008, 0x100C. Linear, monotonic — a simple 4-word linear block.
• WRAP4 from 0x1008. B = 4×4 = 16. base = 0x1008 & ~15 = 0x1000. offset[n] = (0x1008 + 4n) & 15: n=0→8, n=1→12, n=2→0, n=3→4. So addr = 0x1008, 0x100C, 0x1000, 0x1004 — wraps at the 0x1010 boundary back to the block base 0x1000. A 4-word cache line fill, critical-word-first from 0x1008.
• WRAP8 from 0x2010. B = 8×4 = 32. base = 0x2010 & ~31 = 0x2000. offset[n] = (0x2010 + 4n) & 31: 16, 20, 24, 28, then (0x2010+16=0x2020) → 0x20 & 31 = 0, then 4, 8, 12. So addr = 0x2010, 0x2014, 0x2018, 0x201C, 0x2000, 0x2004, 0x2008, 0x200C — wraps at 0x2020 back to 0x2000. An 8-word cache line fill from 0x2010.
• WRAP16 from 0x3038. B = 16×4 = 64. base = 0x3038 & ~63 = 0x3000. The offsets go 0x38, 0x3C, then wrap: (0x3038+8=0x3040) → 0, 4, 8, … up to 0x34. So addr = 0x3038, 0x303C, 0x3000, 0x3004, … 0x3034 — wraps at 0x3040 back to 0x3000. A 16-word (64-byte) cache line fill from 0x3038.
• The pattern. In each WRAP case, the recipe is identical: compute B = L×s, the aligned base (clear the low log2(B) bits of the start), and each offset as the linear address modulo B, then OR them. The high bits stay at the base; the low bits wrap. INCR is even simpler — just start + n×s. One pair of formulas, applied with the right L and s, gives every burst's addresses.
• Verification use. A verification engineer uses these formulas to check a DUT's burst addresses: compute the expected sequence and compare against the observed HADDR. A mismatch (e.g., the DUT didn't wrap, or computed the wrong base) is a burst-address bug. So the formulas are both a generation recipe and a checking tool.

The example shows the formulas applied across all the WRAP lengths and INCR, with the identical recipe (compute B, the aligned base, and the modular offsets). The same two formulas, parameterized by L and s, produce every burst's addresses — and serve as the reference for verifying a design's burst addressing.

8. Common Mistakes

9. Interview Insight

Burst address calculation is a Critical, calculation-heavy interview topic — being able to derive a WRAP sequence on the spot is the test.

The answer that lands states both formulas and the bit-level view, then derives an example: "For INCR, beat n's address is just start + n × s, the beat size times n added to the start — linear, and it can cross block boundaries. For WRAP, the block size is B = L × s — the beat count times the beat size. The aligned base is the start with the low log2(B) bits cleared, start & ~(B−1). The offset is the linear address modulo B, (start + n×s) & (B−1). And the beat address is base | offset. The clean way to see it: split the address into high and low bits; WRAP wraps the low log2(B) bits while the high bits stay fixed at the aligned base — so it's a modular increment confined to the low bits, which is exactly what keeps the burst inside one aligned block. For example, a WRAP4 of words from 0x08: B is 16, base is 0x00, offsets are 8, 12, 0, 4, so the addresses are 0x08, 0x0C, 0x00, 0x04 — wrapping at the 16-byte boundary." The two formulas, the bit-level wrap view, and a derived worked example are the senior signals.

10. Practice Challenge

Apply the formulas.

1. INCR. Give the addresses of an INCR4 of words starting at 0x40.
2. WRAP, by formula. For a WRAP4 of words from 0x48, compute B, the aligned base, the offsets, and the addresses.
3. Bit-level. Explain which address bits wrap for a WRAP8 of words and why.
4. Derive WRAP16. Give the first few and the wrap point for a WRAP16 of words starting at 0x3038.
5. Verify. Explain how the formulas serve to check a design's burst addresses.

11. Key Takeaways

• INCR: addr[n] = start + n × s — a linear increment (monotonic, can cross boundaries).
• WRAP: with B = L × s, base = start & ~(B−1), offset = (start + n×s) & (B−1), addr[n] = base | offset — the offset wraps modulo the block size.
• Bit-level view: WRAP wraps the low log2(B) bits (the in-block offset) while the high bits (the aligned base) stay fixed — a modular increment confined to the low bits.
• WRAP stays inside one aligned block (size B) because the carry out of the low bits is discarded; INCR can leave the block because the carry propagates.
• Two formulas, parameterized by L and s, cover all burst types — INCR4/8/16 differ only in L; undefined INCR is the INCR formula with unbounded n.
• The formula is shared and standardized — manager and memory compute the same addresses (enabling prefetch and interoperability) — and serves as a verification reference. Watch for WRAP's non-monotonic sequence.

12. What Comes Next

You now have the precise address math. The next chapter focuses on the wrap boundary specifically:

• 8.8 — Boundary Wrapping (coming next) — the wrap boundary math (why B = L × s, why aligned) and a deeper look at why WRAP bursts exist.

To revisit the burst types, see WRAP4 & INCR4, WRAP8 & INCR8, WRAP16 & INCR16, and INCR (Undefined-Length) Bursts; for the overview, Burst Overview. For the HSIZE that sets the beat size, see HSIZE. For the broader protocol map, see the AMBA family overview.